发明名称 PLL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To prevent a PLL circuit from getting into a deadlock state and to make it possible to return into a normal rock state by detecting the phase difference between a reference signal and a feedback signal and discharging an error signal or control signal under the control of a reset signal. SOLUTION: A phase comparator 12 detects the phase difference between the external reference signal of specific frequency and a feedback signal from a voltage-controlled oscillator 18 and outputs a control signal UP or DOWN. A charge pump 14 outputs an error signal corresponding to the phase difference according to the control signal from the phase comparators 12 when the reset signal is inactive. Here, the reset signal becomes active when a PLL circuit 10 possibly comes to a deadlock or has come to the deadlock. At this time, the charge pump 14 outputs the error signal which lowers the voltage level of the control signal irrelevantly to the control signal. Then the output signal and feedback signal are outputted from the voltage-controlled oscillator 18 through a loop filter 16.
申请公布号 JPH10173520(A) 申请公布日期 1998.06.26
申请号 JP19960329462 申请日期 1996.12.10
申请人 KAWASAKI STEEL CORP 发明人 TAKADA MASATOSHI
分类号 H03L7/093 主分类号 H03L7/093
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