发明名称 DELTA-SIGMA MODULATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a delta-sigma modulation circuit of a small scale which has a high S/N and can prevent increase of the number of quantizers. SOLUTION: A 1st subtracter 100 calculates the difference between an analog input signalαX and a feedback signal FB which is multiplied byα(>1) by an amplifier 107 and supplied from a feedback delay unit 106. The output of the subtracter 100 is inputted to a 1st integrator 101. Then the output of a 2nd subtracter 103 which calculates the difference between the output of the integrator 101 attenuated down to 1/αby an attenuator 102 and the output of the unit 106 is inputted to a 2nd integrator 104. The output of the integrator 104 is quantized by a quantizer 105, delayed by the unit 106 by a single sample period, converted into the analog signals and fed back to the subtracters 100 and 103. At the same time, the output of the quantizer 105 is extracted as a digital output signal Y.
申请公布号 JPH10173534(A) 申请公布日期 1998.06.26
申请号 JP19960330706 申请日期 1996.12.11
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SOBASHIMA AKIRA;KANEAKI TETSUHIKO;HATANAKA HIDEAKI
分类号 H03M1/08;H03M1/00;H03M3/04;(IPC1-7):H03M3/04 主分类号 H03M1/08
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