发明名称 CDMA CHIP-SYNCHRONIZING CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To attain synchronizing follow-up (tracking) on the fluctuation of a reception level, and to attain stable reception by selecting and demodulating a correlator output (an inversion diffusion signal) in a timing with the most satisfactory reception quality in a constant time interval. SOLUTION: A delaying means 109 delays an inversion diffusion code, so that it can be matched with a reception timing detected by a search means 111. Next, a shift register 110, having plural output terminals, delays the delayed inversion diffusion code in a constant delay interval. Then, plural correlators 102 operate the inversion diffusion of a reception signal by calculating a correlation value between a digital base-band signal and each output of the shift register 110. Then, the outputs of the plural correlators 102 are temporarily stored in a memory 103. An optimal value detecting means 104 and a selecting means 105 read the memory 103 in a constant interval, and selects the correlator output with the most satisfactory reception quality. Then, a synchronization detection means 106 operates synchronization detection by using the selected correlator output.</p>
申请公布号 JPH10173630(A) 申请公布日期 1998.06.26
申请号 JP19960333393 申请日期 1996.12.13
申请人 NEC CORP 发明人 SATO TOSHIBUMI
分类号 H04J13/00;H04B1/7085;H04B7/26;H04L7/00;H04W56/00;(IPC1-7):H04J13/00 主分类号 H04J13/00
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