MEM0RY SYSTEM FOR TIME-MULTIPLEXING BETWEEN PLURAL CONSTITUTION SETTINGS OF PROGRAMMABLE SWITCH ELEMENT IN FPGA,申请号JP19970002064-传众专利搜索

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发明名称	MEM0RY SYSTEM FOR TIME-MULTIPLEXING BETWEEN PLURAL CONSTITUTION SETTINGS OF PROGRAMMABLE SWITCH ELEMENT IN FPGA
摘要
申请公布号	JPH10173516(A)	申请公布日期	1998.06.26
申请号	JP19970002064	申请日期	1997.01.09
申请人		发明人
分类号	G11C7/00;G06F9/06;G11C11/419;H01L21/82;H03K19/173;H03K19/177;(IPC1-7):H03K19/177	主分类号	G11C7/00
代理机构		代理人
主权项
地址

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