| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor storage for reducing a consumption current in high-voltage operation state and compensating for an operation in low-voltage operation state. SOLUTION: When an address is inputted to an address input part 22, address transition signals ATDS0-ATDSn are outputted from address transition detection circuits ATD0-ATDn to a synchronization signal generation circuit 33. Then, the synchronization signal generation circuit 33 operates a first precharge circuit 25 and performs precharging for a memory cell array 24. A precharge end detection circuit 27 detects whether precharging is sufficient or not, and a precharge control circuit 37 operates a second precharge circuit 26 for performing precharging at a higher voltage level than the first precharge circuit 25 when precharging is not sufficient, namely in a low-voltage operation state. |
