| 摘要 |
PROBLEM TO BE SOLVED: To promptly pull in a loop within a prescribed phase error range at the time of starting control, to stably control in a normal receiving state and to promptly pull back the loop within the prescribed phase error range if the lock begins to be released when a system clock is generated using a time reference value transmitted in a bit stream. SOLUTION: A PCR(program clock reference) transmitted from the bit stream is detected by a PCR extracting circuit 51. A clock from a VCO 57 is counted by an STC(system time clock) counter 52, and the value of the STC counter 52 and the value of the PCR at a timing that the time reference value is detected are compared. This phase error is fed back to the VCO(voltage controlled oscillator) 57 via a digital filter 54. The gain of the digital filter 54 is set to a large value to promptly converge the phase error within a permitted error range, and if it is in a locked state, the gain is set to a small value and keeping a stable control, while if the lock begins to be released, the gain is set to an intermediate value to promptly pull in the phase error within the permitted error range. |
