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发明名称
A semiconductor memory circuit equipped with a column addressing circuit having a shift register
摘要
申请公布号
EP0782143(A3)
申请公布日期
1998.06.24
申请号
EP19960120772
申请日期
1996.12.23
申请人
KABUSHIKI KAISHA TOSHIBA
发明人
INUZUKA, KAZUKO;OHSHIMA, SHIGEO;NAGABA, KATSUSHI
分类号
G11C11/407;G11C8/04;G11C11/408;(IPC1-7):G11C8/04
主分类号
G11C11/407
代理机构
代理人
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