| 摘要 |
A phase detector for a phase-locked loop ("PLL") circuit under control of a local oscillating clock ("LOSC") signal and a method of operation thereof. The phase detector includes: (1) a first circuit that receives a reference data ("REF") signal and the LOSC signal and develops therefrom an up pulse and a delayed data signal, (2) a second circuit, having an input coupled to an output of the first circuit, that receives the delayed data signal and the LOSC signal and develops therefrom at least one down pulse, a period of the at least one down pulse being substantially equal to a period of the LOSC signal and (3) a charge pump, having a predetermined up current setting and a predetermined down current setting, the predetermined down current setting being different from the up current setting to compensate for the period of the at least one down pulse, that receives the up pulse and the at least one down pulse and develops therefrom a voltage-controlled oscillator ("VCO") drive signal, the period of the at least one down pulse being substantially equal to the period of the LOSC signal to render the VCO drive signal less sensitive to variations in LOSC signal duty cycle.
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