Low latency error reporting for high performance bus

摘要

A system and method are provided that use a determination of bad data parity and the state of an error signal (Derr-) as a functional signal indicating a specific type of error in a particular system component. If the Derr- signal is active, the parity error recognized by the CPU was caused by a correctable condition in a data providing device. In this instance, the processor will read the corrected data from a buffer without reissuing a fetch request. When the CPU finds a parity error, but Derr- is not active a more serious fault condition is identified (bus error or uncorrectable multibit error) requiring a machine level interrupt, or the like. And, when no parity is found by the CPU and Derr- is not active, then the data is known to be valid and the parity/ECC latency is eliminated, thereby saving processing cycle time.