发明名称 |
INTEGRATED CIRCUIT WITH COMPLEMENTARY ISOLATED BIPOLAR TRANSITORS AND METHOD OF MAKING SAME |
摘要 |
Process for making an integrated-circuit (IC) chip with junction-isolated complementary bipolar transistors. In this process an N-well is formed in a P-type substrate. P-type dopant is implanted in the N-well to become a sub-collector for a pnp transistor. N-type dopant is implanted in the substrate in a location laterally displaced from the N-well to become a sub-collector for an npn transistor. N-type material is implanted in the N-well to begin the formation of an isolation wall for the pnp transistor. A P-type epitaxial (epi) layer then is grown over the P-type substrate. N-type material is implanted in the epi layer to complete the isolation wall for the pnp transistor, and to complete the collector for the npn transistor. P-type and N-type material also is implanted in the P-type epi layer to form the bases and emitters for the npn and pnp transistors. |
申请公布号 |
EP0792514(A4) |
申请公布日期 |
1998.06.17 |
申请号 |
EP19950940602 |
申请日期 |
1995.11.02 |
申请人 |
ANALOG DEVICES, INCORPORATED |
发明人 |
LAPHAM, JEROME, F.;SCHARF, BRAD, W. |
分类号 |
H01L21/761;H01L21/8228;H01L27/082;H01L29/732 |
主分类号 |
H01L21/761 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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