发明名称 Biasing circuit for reducing body effect in a bi-directional field effect transistor
摘要 A field effect transistor (FET) includes a first source/drain terminal, a body terminal, and a second source/drain terminal. A bi-directional N-channel FET circuit includes a biasing circuit which couples the body terminal of the bi-directional FET to one of its first and second source/drain terminals having a lesser voltage when the first and second source/drain voltages differ by more than a threshold voltage. When the voltages differ by a threshold voltage or less, the body terminal floats at a voltage no higher than a diode drop above the lesser of the two source/drain voltages, and at a voltage no lower than a threshold voltage below the higher of the two source/drain voltages. An analogous bi-directional P-channel FET circuit is also described. Body effect is reduced because the body terminal of the FET is maintained at a voltage at or near the voltage of the effective source terminal at all times, irrespective of which of the two source/drain terminals is the effective source terminal. Consequently, the ON-resistance of the FET is reduced.
申请公布号 US5767733(A) 申请公布日期 1998.06.16
申请号 US19960710603 申请日期 1996.09.20
申请人 INTEGRATED DEVICE TECHNOLOGY, INC. 发明人 GRUGETT, BRUCE C.
分类号 H03K17/06;H03K17/687;(IPC1-7):H03K17/795 主分类号 H03K17/06
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