| 摘要 |
A data processing apparatus includes apparatus for modelling asynchronous logic circuits as at least two of circuit elements the functions of which are governed by a set of rules each defining a response to a given condition. For elements functioning as registers (x,b) a "copy" rule may be applied to at least one of them (x) with the associated response to the copy rule being the change of the output state of that register element (218,220) in response to a change of output state of a further register element (b) identified by the copy rule. A further "identify" rule (200-226) may be applied to pairs of the register elements (x,b), according to which rule copy rules are applied to each element of the pair (216-222) in respect of changes of output state of the other. The apparatus may be arranged to model a number of asynchronous logic circuits in a working memory area with interconnections between such circuits being established by use of the identify rule.
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