| 摘要 |
<p>1282055 Matrix displays WESTERN ELECTRIC CO Inc 2 Dec 1969 [5 Dec 1968] 58683/69 Heading G5C [Also in Division C4] A two-terminal display cell 100 comprises a bilateral breakdown switch 112 having a conducting state when a threshold voltage is exceeded, charge storage means 113 and a light emitting semi-conductor device 116, connected in series. The switch and storage means provide a " memory " for the cell which remains on or off after the application of a write or erase signal. The switch is a PNPN breakdown diode or of the oronic threshold type. The light emitting device 116 is a GaAsP or GaP electroluminescent diode. The storage means comprise a capacitor 113 when a diode 114 is connected in parallel with the diode 116 or a charge storage diode poled opposite to the diode 116. In a matrix array an A.C. bias from a source 20 is applied across all the cells via pulse transformer drivers 30, 40, the bias being less than the switch threshold voltage so that no current flows and the capacitor 113 is uncharged. The application to selected row and column conductors of coincident signals in the form of write pulses, near the peak bias voltage causes the switch to conduct, allowing current to flow briefly to charge capacitor 113 and energize diode 116. During the following negative half-cycle the charge on capacitor 113 adds to the bias voltage and again causes switch 112 to conduct allowing current to flow through diode 114 which may also be electroluminescent. Diode 116 continues to emit light until an erase pulse sufficient to turn switch 112 on when the bias voltage is near zero. This discharges the capacitor 113 and since the bias voltage is near zero no charge builds up. Images may be formed manually using a low voltage pen to render switches 112 conducting.</p> |
