发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
A semiconductor integrated circuit device having a package structure, in which two kinds of chips, one chip mounted with a CPU and a flash memory and the other mounted with a DRAM are contained in a single package. This structure reduces the number of external connection terminals and the IC mounting area, and lowers the manufacturing cost. The semiconductor integrated circuit device comprises a chip (MF) mounted with a microcomputer including a CPU, a memory and peripheral circuits and a flash memory, and a chip (AD) mounted with a DRAM and a logic circuit such as an ASIC. In the connection between the chip (MF) and the other chip (AD), address terminals (A0-A10), data input/output terminals (D0-D31), a power supply terminal (Vcc), a ground terminal (Vss) and control terminals such as row address strobe terminals (<o>RAS</o>, column address strobe terminal <o>CASL</o>, <o>CASH</o>, <o>CASHL</o>, <o>CASHH</o>) are connected to the same external connection terminals of the single-package semiconductor integrated circuit.
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申请公布号 |
WO9825213(A1) |
申请公布日期 |
1998.06.11 |
申请号 |
WO1996JP03550 |
申请日期 |
1996.12.04 |
申请人 |
HITACHI, LTD.;NOGUCHI, KOKI;MICHISHITA, SATOSHI;HORIGUCHI, MASASHI;KUBO, MASAHARU;MIYAMOTO, TOSHIO;NISHIMURA, ASAO |
发明人 |
NOGUCHI, KOKI;MICHISHITA, SATOSHI;HORIGUCHI, MASASHI;KUBO, MASAHARU;MIYAMOTO, TOSHIO;NISHIMURA, ASAO |
分类号 |
G06F15/78;G11C5/00;(IPC1-7):G06F15/78;G11C11/407;H01L27/108 |
主分类号 |
G06F15/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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