| 摘要 |
A one-chip local area network (LAN) device comprises more than one local area network interface ports each including one receiver (11-14), one transmitter (15-18) and one triplet processor (25-28), a high-speed data bus (24) to which individual ones of the plurality of local area network interface ports are connected, and a switch engine (34) connected to the high-speed data bus (24) and including a packet buffer controller (40), a high-speed data bus controller (42) and content-addressable memory manager (44). Each triplet processor (25-28), provides for the reading of a destination address in packets received from a corresponding one of the local area network interface ports and simultaneously provides for the cut-through transmission of packets received from other ones of the local area network interface ports that transfer the packets over the high-speed data bus (24).
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