发明名称 Sizing apparatus for active devices of integrated circuits and sizing method therefor
摘要 A sizing apparatus for active devices of an integrated circuit has a storage unit for storing information about connections between the active devices and a delay constraint, a size initializing unit for initializing a size of the active device to a minimum value, an electric current consumption change rate arithmetic unit for calculating a change rate of an electric current or power consumption when the size is increased, a delay calculating unit for calculating a maximum signal delay by analyzing a timing on the basis of the connecting formation, a delay constraint judging unit for judging whether or not a maximum signal delay satisfies the delay constraint, a critical path extracting unit for extracting a critical path from paths that do not satisfy the delay constraint, a delay improvement arithmetic unit for calculating an improvement rate of the signal delay of the critical path with respect to a variation quantity of the electric current or power consumption when increasing the size of the active device, a selecting unit for selecting the active device having the maximum improvement rate and a control unit for selecting a minimum change rate of the electric current or power consumption and making the delay calculating unit calculate a signal delay when increasing the size of the active device in accordance with the selected change rate.
申请公布号 US5764531(A) 申请公布日期 1998.06.09
申请号 US19960616991 申请日期 1996.03.14
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KOJIMA, NAOHITO;YAMADA, MASAAKI
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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