发明名称 |
Cache-Speicher mit der Möglichkeit im Fehlgriffsfall gleichzeitig zu aktualisieren und eine Entscheidung über die nächste Adresse zu treffen |
摘要 |
In a cache memory simultaneously conducting updating for a mishit and a decision on a mishit for the subsequent address, a write flag (15) generated by a control unit (18) is written in a valid flag field (9a). Based on this method, during an access to an external memory at an occurrence of a mishit, a tag field (6a) and the valid flag field are simultaneously updated. When updating a data field (8), a read operation is achieved on the tag and valid flag fields to decide occurrence of a mishit. Thus, an external memory access for a mishit at a next address can be executed at an earlier point of time. Moreover, by the provision of a data latch (21) disposed for an output from the data field, and by reading data at a next address and keeping it in the data latch (21) during a memory read cycle (C1, C3), succeeding hit data can be outputted immediately after a mishit processing is completed. Furthermore, also in a cache memory having a plurality of tag fields (6a, 6b) and a plurality of valid flag fields (9a, 9b), the updating for a mishit and the decision on a mishit for a next address can be attained at the same time. |
申请公布号 |
DE69031696(T2) |
申请公布日期 |
1998.06.04 |
申请号 |
DE1990631696T |
申请日期 |
1990.06.20 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., KADOMA, OSAKA, JP |
发明人 |
TAKAHASHI, KAZUNORI, NEYAGAWA-SHI, JP;KIYOHARA, TOKUZO, OSAKA-SHI, JP |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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