发明名称 |
Analog-to-digital conversion circuit |
摘要 |
The circuit includes a converter arrangement (1) which receives an analog input signal (FBAS) which contains a signal component with a predetermined frequency, and outputs a digital output signal (FBAS') with a clock signal (CLK) synchronised to the predetermined frequency. A device (2) combines at least two sample values of the output signal, and a low-pass filter (3) is supplied with a signal which is proportional to the two sample values. A frequency of an oscillator (4) is controlled by an output signal of the filter (3), and provides a signal from which the sampling clock of the analog-to-digital converter is derived. The input signal is pref. a video signal with a colour-burst, and the sample values are combined only during the period of the colour-burst. The sampling frequency is pref. four times the colour-burst frequency.
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申请公布号 |
DE19649408(A1) |
申请公布日期 |
1998.06.04 |
申请号 |
DE19961049408 |
申请日期 |
1996.11.28 |
申请人 |
SIEMENS AG, 80333 MUENCHEN, DE |
发明人 |
KUTTNER, FRANZ, ST. ULRICH, AT |
分类号 |
H03L7/091;H03L7/099;H04N9/44;(IPC1-7):H03M1/12;H04N9/64 |
主分类号 |
H03L7/091 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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