| 摘要 |
A method of forming array circuitry at a surface of a substrate, the array including a first conductive layer with M scan lines (20,30,22), a second conductive layer with N data lines (24,32,26), and cell circuitry for a region (34) in which the mth scan line and the nth data line cross. The cell circuitry includes a component (40) with a data lead for receiving signals from or providing signals to the nth data line (32). A first semiconductor layer (42) of the cell circuitry includes a first line with a channel (46) between a connecting point (D1) to the nth data line and a connecting point (D2) to the component's data lead. A second semiconductor layer (44) includes a second line extending from a connecting point (D3) to the mth scan line and crossing the first line (42) at the channel (46). The first and second conductive layers and the cell circuitry are formed with electrical connections at the connecting points so that signals on the mth scan line control conductivity of the first line between the nth data line and the data lead. The semiconductor layers can be polysilicon. The first semiconductor layer (42) can be formed before the second semiconductor layer (44), with the first line electrically connected to the data lead by implanting a dopant. The connections to the mth scan line and the nth data line can be metal/semiconductor interfaces, with the first conductive layer deposited on the second line and with the second conductive layer deposited on the first line through an opening in an insulating layer. <IMAGE> |
