发明名称 VOLTAGE GENERATING CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a voltage generating circuit for multileveled cell capable of outputting outputs linked with fluctuations of threshold voltage due to positions of selected memory cell transistors. SOLUTION: This voltage generating circuit is provided with partial circuits 101∼105 of the same number of stages at that of memory cell transistors and the respective partial circuits 101∼105 are respective provided with cell partial circuits 106∼110 and respective cell partial circuits 106∼110 have memory transistors and resistances and respective resistances are set to be resistance values equal to resistance values to be parastically added to source terminals and drain terminals of memory cell transistors. Then, voltages linked with fluctuations of threshold voltage to be generated by differences between source potentials and substrate potentials are generated by connecting the same signals as that of word lines to the partial circuits 101∼105 and by selecting the partial circuit equal to a memory cell transistor whose word line is selected.</p>
申请公布号 JPH10149689(A) 申请公布日期 1998.06.02
申请号 JP19960320827 申请日期 1996.11.15
申请人 NEC CORP 发明人 SUZU TAKAYUKI;HIBINO KENJI
分类号 G11C16/06;G11C5/14;G11C16/02;G11C17/12;(IPC1-7):G11C16/02 主分类号 G11C16/06
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