发明名称 ENDURANCE TEST PATTERN OF FLASH EEPROM
摘要 <p>PROBLEM TO BE SOLVED: To accurately detect a point where an operational degradation occurs and whether it is related to a programming, an erasing, or a reading operation by a method wherein an active region is demarcated so as to be isolated, and a source region and a drain region are separated from each other by a cell. SOLUTION: A field oxide film 2 is formed on a semiconductor substrate through an element isolation process. In result, at least three isolated active regions 100 are defined. A cell is formed in each of the active regions on its right and left part respectively sandwiching a drain region 9 between them, a first common floating gate 4A is formed in the active regions 100 so as to hold the left cells in common, and a second common floating gate 4B is formed so as to hold the right cells in common. Furthermore, a select gate 12 is formed in the active regions 100 so as to pass above two stacked transistor patterns, two source region 8 and two drain regions 9.</p>
申请公布号 JPH10150173(A) 申请公布日期 1998.06.02
申请号 JP19970301464 申请日期 1997.11.04
申请人 HYUNDAI ELECTRON IND CO LTD 发明人 RI HIRETSU
分类号 H01L21/66;G11C16/06;G11C29/04;G11C29/12;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L27/115;H01L21/824;G11C29/00 主分类号 H01L21/66
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