发明名称 DC offset compensation device
摘要 A level detector 2 detects variation of the amplitude of an input signal a to output a level signal b representing HIGH or LOW in order to define the head portion of the input circuit a. A time constant control signal 3 generates a time constant control signal c based on the level signal b to control a time constant of an estimator 4 so as to make the time constant small for a prescribed period from a time when the level signal b varies from HIGH to LOW. The estimator 4 estimates DC offset included in the input signal a with the a time constant variation according to the time constant control signal c to output an estimate d. A compensator 1 subtracts the estimate d from the input signal a to obtain a compensation output. Therefore, in the estimator 4, the speed of estimating the DC offset is different between a period corresponding to the head portion of the input signal a and other periods. Thus, a DC offset compensation device can be configured to be capable of fast DC offset compensation at the head portion of the input signal a and stable DC offset compensation at the other portions.
申请公布号 US5760629(A) 申请公布日期 1998.06.02
申请号 US19960683309 申请日期 1996.07.18
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 URABE, YOSHIO;TAKAI, HITOSHI;YAMASAKI, HIDETOSHI;TATSUTA, AKIHIRO
分类号 H03G3/20;H03F1/30;H03F3/34;(IPC1-7):H03L5/00 主分类号 H03G3/20
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