发明名称 Data processing apparatus with data bit width conversion
摘要 In outputting data input in units of a bits in units of b bits (a<b) using a memory for storing data, the reading of the memory is controlled such that a first item of b-bit data is formed in so as to include all of a first item of a-bit data. Items of b-bit data succeeding the first item of the b-bit data are formed by using b/k bits taken from each of k items of a-bit data of those items of the a-bit data succeeding the first item of a-bit data, and the portion of the first item of b-bit data other than the first item of a-bit data is formed of (a-b/k) bits in the succeeding items of a-bit data (where a, b and k are integers), whereby the units in data processing can be changed by a simple construction and improvement in data transfer efficiency can be achieved.
申请公布号 US5761348(A) 申请公布日期 1998.06.02
申请号 US19950573534 申请日期 1995.12.15
申请人 CANON KABUSHIKI KAISHA 发明人 HONMA, YOSHIHIRO
分类号 G06F5/00;G06F13/40;G11B20/10;(IPC1-7):G06K9/54;G06K9/60 主分类号 G06F5/00
代理机构 代理人
主权项
地址