VOLTAGE TRABSLATOR FOR MEMORY CIRCUITS

摘要

PROBLEM TO BE SOLVED: To provide a circuit which drives the line of memory or word line by once inverting the connecting node between the gate region of a first feedback TR and that of a second switch TR and connecting it to the ground through an N-MOS decoupling TR whose gate is driven by a selection signal inputted from the connection node between a NOR gate circuit and an inverter circuit. SOLUTION: When the selection logic signal is at the zero level, the node 5 stays at the logic level 1 in correspondence with the supply voltage. The TN1 of a TR driven by an inversion selective signal is turned on to compulsively lower the node 6 to the zero level. As soon as the node 6 is forced down to the logic level zero, the TR pulldown 2 is turned off. This is because it is required that the logic level 1 on the node 5 is inverted again by the inverter circuit BUFF to make it the logic level zero and the logic level on the gate region of the TR pulldown 2 is zero.