发明名称 Video signal data and composite synchronization extraction circuit for on-screen display
摘要 A signal voltage level dual clamping circuit is disclosed for use in a receiving circuit for extraction of timing information from a signal. A first, start-up voltage level clamp is provided, the operation of which is independent of the signal timing information. A second, gated voltage level clamp is provided, the operation of which is dependent on the signal timing information. A switching circuit operates to switch the first clamp out of operation and switch the second clamp into operation once sufficient timing information has been extracted from the signal to permit operation of the second clamp.
申请公布号 US5760844(A) 申请公布日期 1998.06.02
申请号 US19960699923 申请日期 1996.08.20
申请人 EEG ENTERPRISES, INC. 发明人 JORDEN, WILLIAM B. H.
分类号 H03K5/007;H03K5/08;H04L7/10;H04L25/06;H04N5/08;H04N5/445;H04N7/035;(IPC1-7):H04N5/18 主分类号 H03K5/007
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