| 摘要 |
FIELD: computer engineering. SUBSTANCE: device has P processing units 1, where L = P+R, P = max(P<SB>0</SB>, P<SB>1</SB>), P<SB>0</SB>UP<SB>1</SB>- are dimensions of weight vectors, R is number of redundant processing units 1. In addition device has two adders 2 and 3, L combination adders 4, (L-1) register 5, group of L comparison gates 6, comparison gate 7, (L-1) groups of AND gates 8, (L-1) groups of AND gates 9, L groups of AND gates 10, (L-1) groups of OR gates 11, (L-1) groups of OR gates 12, OR gates groups 13 and 14, OR gate 15 and failure signal generator 16. Device provides parallel-serial processing with hardware control, routing and substitution of fault processing units. EFFECT: increased reliability. 4 tbl, 7 dwgo
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