发明名称 Non-equalized digital receiver using block decoding with erasure and error correction
摘要 <p>A communications receiver system is presented for detecting burst errors and providing erasure information to the block decoder, thereby effectively doubling the conventional correction capability of the block decoder with only a minimal increase in complexity. In one embodiment, the receiver includes a demodulator modified to detect error bursts in the received symbol sequence. Once detected, the locations of symbols in error are marked in the form of erasure flags. An error correction decoder is then able to correct up to twice as many errors with the additional information provided by the erasure flags. &lt;IMAGE&gt;</p>
申请公布号 EP0844758(A2) 申请公布日期 1998.05.27
申请号 EP19970118904 申请日期 1997.10.30
申请人 LSI LOGIC CORPORATION 发明人 LUTHI, DANIEL A.;BHASKARAN, RAVI;RHEE, DOJUN;MOGRE, ADVAIT M.
分类号 H03M13/00;H03M13/15;H03M13/27;H04L1/00;(IPC1-7):H04L1/00 主分类号 H03M13/00
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