| 摘要 |
<p>In a data multiplexing/demultiplexing apparatus including a serial-to-parallel converter (1), a microprocessor (2') and a memory (3), a data shift register (41) inputs data from the memory by way of the microprocessor, a correction register (42) stores a shift correction amount on a transmission path of the data shift register. A framing rule register (43) stores a framing rule determined by the microprocessor, a counter (44), carries out a counting operation in accordance with the framing rule to an address information signal. A look-up table ROM (45) outputs a selector selection signal in accordance with the address information signal, and a data selector (46) distributes output data of the data shift register among a plurality of shift registers (47-1, 47-2,...) in accordance with the selector selection signal. The microprocessor analyzes data separated by the plurality of shift registers, performs a synchronism detecting operation and a protocol determining operation, and determines the framing rule. <IMAGE></p> |
