发明名称 |
Drain off-set for pull down transistor for low leakage SRAM's |
摘要 |
The pull down transistor of a static SRAM semiconductor device is formed with oxide and polysilicon regions formed on a doped silicon substrate. A masking area is formed over the drain side of the polysilicon and the areas of the drain region proximal to the gate in the silicon and oxide layers below. N+ dopant is implanted into the unmasked areas of said substrate about the polysilicon region with the drain doping offset by the resist overlying the proximal portion of the drain region. A spacer is formed by chemical vapor deposition about the polysilicon region. Next an N- implantation follows with the offset provided by the spacers about the polysilicon region./!
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申请公布号 |
US5757083(A) |
申请公布日期 |
1998.05.26 |
申请号 |
US19960728090 |
申请日期 |
1996.10.09 |
申请人 |
UNITED MICROELECTRONICS CORPORATION |
发明人 |
YANG, MING-TZONG |
分类号 |
H01L21/336;H01L21/8244;H01L27/11;H01L29/78;(IPC1-7):H01L27/11 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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