发明名称 |
Page-mode memory device with multiple-level memory cells |
摘要 |
A page-mode semiconductor memory device comprises a matrix of memory cells arranged in rows and columns, each row forming a memory page of the memory device and comprising at least one group of memory cells, memory page selection means for selecting a row of the matrix, and a plurality of sensing circuits each one associated with a respective column of the matrix. The memory cells are multiple-level memory cells which can be programmed in a plurality of c=2b(b>1) programming states to store b information bits, and the sensing circuits are serial-dichotomic sensing circuits capable of determining, in a number b of consecutive approximation steps, the b information bits stored in the memory cells, at each step one of said b information bits being determined, said at least one group of memory cells of a row forming a number b of memory words of a memory page.
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申请公布号 |
US5757719(A) |
申请公布日期 |
1998.05.26 |
申请号 |
US19970869208 |
申请日期 |
1997.06.05 |
申请人 |
SGS-THOMSON MICROELECTRONICS S.R.L. |
发明人 |
CALLIGARO, CRISTIANO;GASTALDI, ROBERTO;MANSTRETTA, ALESSANDRO;CAPPELLETTI, PAOLO;TORELLI, GUIDO |
分类号 |
G11C16/02;G11C11/56;(IPC1-7):G11C13/00 |
主分类号 |
G11C16/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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