Semiconductor memory device with on-chip boosted power supply voltage generator

摘要

A semiconductor memory device uses three different power supply voltage levels including an internal IVcc, ground Vss and a boosted level Vpp more positive than the internal Vcc. A precharge control circuit in the memory device includes at least one NMOS transistor, at least one PMOS transistor and an output node having voltage values ranging from the IVcc either to Vss or to Vpp. The NMOS transistor acts as a loading transistor to the PMOS transistor and prevents latch-up in the PMOS transistor by maintaining IVcc below Vpp during the initial power set-up period of the memory device.