发明名称 |
Amplifier circuit and complementary amplifier circuit with limiting function for output lower limit |
摘要 |
The potential of a data line is precharged to an H level by a P channel MOS transistor rendered conductive by a precharge signal. The potential of the data line is not driven by a differential amplifier circuit until the difference between the potential of the output of the differential amplifier circuit providing a corresponding signal and the potential (H level) of the data line become the level of a threshold voltage Vth(n) of an N channel MOS transistor. Therefore, erroneous data will not be provided to the data line even in the case of insufficient equalization of an I/O line pair or when there is an offset in the differential amplifier circuit.
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申请公布号 |
US5757711(A) |
申请公布日期 |
1998.05.26 |
申请号 |
US19960681431 |
申请日期 |
1996.07.23 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
NAKAOKA, YOSHITO;FURUTANI, KIYOHIRO;ASAKURA, MIKIO |
分类号 |
G11C11/409;G11C7/06;G11C7/10;(IPC1-7):G11C7/02 |
主分类号 |
G11C11/409 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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