发明名称 VOICE PROCESSING LSI
摘要 PROBLEM TO BE SOLVED: To reduce the scale of an error check circuit in the voice formats of AC-3 Standard and MEPG Standard. SOLUTION: An error check circuit 2 is used to check whether an error is present or not in the voice format of AC-3 Standard before decode processing and the voice fomtat of MEPG Standard after decode processing. In addition to s first memory circuit 4 for decode processing, a second memory circuit 5 is installed for outputting the voice format in compliance with the interface standard of IEC 958 to commonly use the signal required for write operation of two memory circuits.
申请公布号 JPH10133691(A) 申请公布日期 1998.05.22
申请号 JP19960289519 申请日期 1996.10.31
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KASHIWA HIROSHI
分类号 H04N19/102;G10L13/00;G10L13/04;G10L19/00;G10L19/005;G10L19/02;G10L25/00;H03M13/00;H04N7/24;H04N19/00;H04N19/103;H04N19/146;H04N19/159;H04N19/167;H04N19/172;H04N19/196;H04N19/42;H04N19/423;H04N19/44;H04N19/59;H04N19/65;H04N19/70;H04N19/85;H04N19/89 主分类号 H04N19/102
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