| 摘要 |
PROBLEM TO BE SOLVED: To avoid the malfunction of the data shift caused by a clock skew in a multibit shift register circuit. SOLUTION: This shift register circuit has a single flip-flop circuit 11, an n-bit adder 12 and an n-bit multiplier 13 which implements the doubling calculation. An input signal DATA is inputted to the input terminal of the flip-flop circuit 11 and, at the same time, the output signal QA of the flip-flop circuit 11 and the output signal of the multiplier 13 are inputted to two terminals of the adder 12. The n-bit output signal of the adder 12 is inputted to the input terminal of the multiplier 13 and, at the same time, outputted as an output signal. |
