发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To eliminate sensing amplifiers which amplify the voltages of complementary bit lines and reduce the number of circuit elements and the power consumption by a method wherein the complementary bit lines are precharged by a power supply voltage and a comparing circuit is composed of MOS-FET's which are in off-states with the precharge voltage. SOLUTION: Three P-MOS-FET's to which a precharge signalΦeq is applied precharge complementary bit lines BOO and /BOO so as to have their voltages equal to a power supply voltage VCC. A comparing circuit is composed of four P-MOS-FET's Q1, Q2, Q3 and Q4. Bit lines BOO and /BOO are connected to the gates of the MOS-FET's Q1 and Q3. Input signals cdi00 and /cdi00 which are to be compared with are supplied to the gates of the MOS-FET's Q2 and Q4 through inverter circuits. If the read signals do not agree with the input signals to be compared with, current paths are composed of both the series MOS-FET's Q1 and Q2 and the series MOS-FET's Q3 and Q4 and disagreement signal is outputted to a node A.
申请公布号 JPH10134582(A) 申请公布日期 1998.05.22
申请号 JP19960300812 申请日期 1996.10.28
申请人 HITACHI LTD 发明人 IWAHASHI MASAYUKI;FUJIMURA YASUHIRO;HIGETA KEIICHI
分类号 G11C11/41;G11C11/401;G11C11/417;(IPC1-7):G11C11/417 主分类号 G11C11/41
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