发明名称 MULTIPROCESSOR SYSTEM
摘要 PROBLEM TO BE SOLVED: To dynamically change the connection between respective processors without changing any hardware when plural processors are provided. SOLUTION: Inside respective processors 101-104, internal input buses 111-114, internal output buses 121-124, 1st and 2nd terminals from 101a and 101b to 104a and 104b and switch circuits 131-134 are arranged. The respective switch circuits 131-134 have a switching mode (a) for connecting 1st terminals to the internal input buses and 2nd terminals, switching mode (b) for connecting the 1st terminals to the internal input buses and connecting the internal output buses to the 2nd terminals and switching mode (c) for connecting the internal output buses to the 1st terminals and connecting the 2nd terminals to the internal input buses. These three kinds of switching modes (a)-(c) are switched by correspondent control signals 141-144. Therefore, one-to-one communication, one-to-multiple communication, plural kinds of one-to-one communication and plural kinds of one-to-multiple communication can be parallelly performed.
申请公布号 JPH10134007(A) 申请公布日期 1998.05.22
申请号 JP19960288154 申请日期 1996.10.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAKAHIRA HIROYUKI;SAKIYAMA SHIRO;FUKUDA MASARU
分类号 G06F15/173;G06F9/46;G06F15/16 主分类号 G06F15/173
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