发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To perform the relief processing of the memory data of defective memory cells in a multiplexer circuit having a page mode without the delay of an access time in a high speed reading mode. SOLUTION: While predetermined page data in the respective memory cell arrays MAm of a main memory part 10 are read out to corresponding sensing amplifier circuit groups SAGm at the time of random access, substituting cell data RDAM corresponding to the defective words (cell data of defective memory cells) are read out to corresponding multiplexer circuits MPm. When the outputs of the sensing amplifier circuit groups SAGm are determined, the defective words are substituted by the substituting cell data by the multiplexer circuits MPm in accordance with data from substituting word selection lines RWDn and substituting bit selection lines RDm. The page data subjected to the substituting process are outputted to corresponding selector circuits SLNm.</p>
申请公布号 JPH10134593(A) 申请公布日期 1998.05.22
申请号 JP19960282767 申请日期 1996.10.24
申请人 SHARP CORP 发明人 HOTTA YASUHIRO;KAWACHI SHUICHIRO
分类号 G11C16/06;G11C7/00;G11C29/00;G11C29/04;(IPC1-7):G11C29/00 主分类号 G11C16/06
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