| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide the reception circuit for mobile communication in which synchronization of bit clock is corrected, so as to conduct communication with high accuracy. SOLUTION: A programmable counter 8 is used for an operating clock generating circuit 7. A recovery clock (RCLK) is generated from a digital signal received by a demodulation section 3. The demodulation section 3 detects a unique word and provides an output of a detection signal (UWDET), synchronously with the bit block (BCLK). The circuit is provided with a comparator 4 that discriminates a phase lead/lag between the detection signal (UWDET) and the recovery clock (RCLK) and with a counter 5, that counts a phase deviation between the bit block (BCLK) and the recovery block (RCLK) based on a clock signal (MCLK). A frequency division ratio of a programmable counter 8 is varied, based on the discriminated result of the comparator 4 and the count of the counter 4.</p> |
