| 摘要 |
PROBLEM TO BE SOLVED: To place a peripheral circuit on the interface of memory cell regions to reduce the chip size, without causing the transistor power difference between the memory cells by making the field plan layout of charge circuits in the same shape as that of the memory cells. SOLUTION: The field plan layout of charge circuits Pc1, Pc2 is formed in the same shape as that of memory cells. The transistor plan layout of the charge circuits Pc1, Pc2 is formed in the same shape as that of the memory cells. Pre-charge circuits Pc1, Pc2 are made e.g. in the same shape as that of the memory cells to make a memory cell group A as a group of SRAM memory cells. Digit lines BT, BB and signal lines S1, S2 for activating the pre-charge circuits Pc1, Pc2; the lines S1, S2 corresponding to word lines of memory cells in the cell group A. |
