| 摘要 |
PROBLEM TO BE SOLVED: To inexpensively and fast correct a frequency of a reproduction clock by setting learning data at the time of convergence to the optimum value that is held in memory when learning data makes a big error, etc. SOLUTION: When a voltage on-detecting circuit 12 detects a PONRST signal, it outputs a voltage on-detection signal 20 to a control circuit 18 and the circuit 18 reads learning data at the time of convergence to the optimum value that is stored in memory 19 and sets it to a learning correction functional digital PLL 17. When an LVA signal (active L) is received, learning data 26 of the circuit 18 is cleared and at this moment, the memory 19 stores the learning data at the time of convergence to the optimum value. There, a hit return signal 22 from a hit detection circuit 13 is outputted, a receiving mode is switched from intermittent receiving to continuous receiving, and the circuit 18 reads the learning data at the time of convergence to the optimum value from the memory 19 with the tailing edge of the signal 22 and sets it to the PLL 17. |
