| 摘要 |
1457866 Semiconductor devices; printed circuits INTERNATIONAL BUSINESS MACHINES CORP 2 April 1975 [15 April 1974] 13545/75 Headings H1K and H1R In a method of making a layered interconnection structure, e.g. for making connections to and for supporting an IC chip 30, a plurality of metallic and insulating layers, including through hole connections, are formed on the flat surface of a temporary support 10, this support is then removed and a further layer or layers is/are formed on the surface of the structure thus exposed. In one embodiment, as shown, the exposed surface 11 is insulating material e.g. SiO 2 or Si 3 N 4 and a metallic layer 20 is formed thereon. In another arrangement, the exposed surface is a screening metal layer (32) (Figs. 2A- 2G, not shown) which then receives an insulating layer (33). The temporary substrate 10 is of N type Si and the metal layers 12A, 15 and insulating layers 11, 13, 16 are formed by standard RF sputter, chemical vapour deposition and thermal oxidation techniques. A thick epitaxial layer of poly Si 18 is grown over the dielectric layer 16 and the temporary support 10 is etched away. Further layers 20, 21, 23, 24 are then formed in a similar manner to form a four level metallic layer structure and a chip 30 is connected by solder reflow pads. In a further arrangement, six metallic layers are formed, three on each side of the screen (32). |
