发明名称 Fast buffer
摘要 <p>There is disclosed a buffer circuit, comprising an FET input amplifier connected to receive an input signal and to produce an output signal representing said input signal, an output amplifier, comprising an FET and a bipolar transistor, connected to receive said output signal from said input amplifier and to develop a circuit output signal, a differential amplifier comprising FET transistors connected to produce an output related to the difference between the input and output signals, and to apply the difference to the base of said bipolar transistor. &lt;IMAGE&gt;</p>
申请公布号 EP0841746(A2) 申请公布日期 1998.05.13
申请号 EP19980102648 申请日期 1992.06.11
申请人 STMICROELECTRONICS, INC. 发明人 BIEN, DAVID EDWARD
分类号 H03F1/08;H03F3/30;H03F3/50;(IPC1-7):H03F3/50 主分类号 H03F1/08
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