| 摘要 |
<p>An integrated data synchronizer circuit between networks, consisting of a timing generator (20) and two identical data synchronizers (21), (22), synchronizing two input links of remote data (9), (11), in respect to a local clock (15), generating two synchronized outputs (7), (8), and (3), (4), per each input data link, with the local clock, one with regard to the leading edge of said clock, and one with regard to the trailing edge, relying on thirteen filled pins constituting an integrated circuit of which five are input pins, four are output pins, two are feed pins, and the other two are ground pins. <IMAGE></p> |
