发明名称 |
Self-aligned source/drain mask ROM memory cell using trench etched channel |
摘要 |
A device and a method are provided for manufacture of that semiconductor memory device on a silicon semiconductor substrate with a vertical channel. A dielectric layer pattern with openings through it is formed. Trenches are formed in the surface of the semiconductor substrate. The trenches have sidewalls. A spacer layer is formed on the surface of the device. The spacer layer is shaped to form spacers in the trenches on the sidewalls. Source/drain regions are formed by ion implanting ions to deposit dopant into the substrate. The device is annealed to form source/drain regions in the substrate. A dielectric layer is formed over the device. A conductive word-line is formed and patterned over the dielectric layer.
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申请公布号 |
US5751040(A) |
申请公布日期 |
1998.05.12 |
申请号 |
US19960716809 |
申请日期 |
1996.09.16 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. |
发明人 |
CHEN, LING;SUNG, HUNG-CHENG;LO, CHI-SHIUNG |
分类号 |
H01L21/8246;H01L27/112;(IPC1-7):H01L27/02;H01L27/10 |
主分类号 |
H01L21/8246 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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