Wide SCSI bus controller with buffered acknowledge signal

摘要

SCSI controller circuitry for controlling devices on a wide SCSI bus that implement the wide SCSI bus standard according to SCSI-2 is implemented with improved circuitry for providing the wide SCSI bus acknowledge signal ACKB*. Specifically, a high speed analog buffer chip is provided that can sync and source over 55 milliamps, that has a propagation delay of 1.5 nanoseconds, and that follows its input with a high degree of accuracy. Using this circuitry, glitches are eliminated in devices with high lump capacitive loads and cross-talk on the wide SCSI bus.