Semiconductor memory and its readout process

摘要

On a sequential read-out of data stored in a matrix of memory cells (MC00-3, MC10-13, MC20-23, MC30-33). A read-out access control circuit (101) for access to the memory cells supplies a line and a column address to a line decoder (102), or to a read-out bit line selector (103). The read-out access control circuit so transmits the line address and column address that each time the access is provided to the N-type memory cell after activation of selected read-out word line, when a read-out word line (RW0-3) is selected by the line decoder.