发明名称 TERMINATION OF HIGH SPEED DATA BUSES, USING IMPEDANCE EMULATION
摘要 <p>The impedance of the bus lines varies with a number of devices coupled to the bus. The number of devices coupled to the bus lines is determined and a precision resistor is selected based upon the number of devices coupled to the bus matching the expected impedance of the bus. A voltage is generated across the precision resistor with a known current and that voltage is compared with the voltage generated across a controllable resistance such as a FET biased in the linear mode with a like current passing through the fed. A feedback network provides a control voltage to the control electrode of the FET to control the resistance of the FET so that the resistance of the FET equals the selected precision resistance. The same control voltage is coupled to the control electrode of other controllable resistances such as FETs operating in the linear region with each FET terminating a separate signal line. Hence, each FET has a resistance about equal to the resistance of each of the signal lines at the predetermined impedance.</p>
申请公布号 WO1998019430(A1) 申请公布日期 1998.05.07
申请号 US1997017950 申请日期 1997.10.06
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