| 摘要 |
An n-type drain diffusion layer (11), an n-type source diffusion layer (12) and an n-type control gate diffusion layer (14) are formed on the surface of a p-type semiconductor substrate (10). Furthermore, an n-type well (15) is connected to the control gate diffusion layer (14). A control gate electrode (54) of aluminum is connected to the well (15). An isolation oxide layer (17) is formed between the control gate electrode (54) and the control gate diffusion layer (14). On the other hand, a first insulation layer (19a,19b) is formed on the drain diffusion layer (11), the source diffusion layer (12) and the control gate diffusion layer (14). Also, a floating gate (13) is formed on the first insulation layer (19a, 19b). The upper portion and the side portion of the floating gate (13) are covered with a second insulation layer (20). The floating gate (13) is completely covered with a protective gate (18) via the second insulation layer (20). The end edge of the protective gate (18) opposes to the well (15) via the isolation oxide layer (17). Also, the drain diffusion layer (11) and the protective gate are (18) connected to each other to have the same potential. <IMAGE> |
