发明名称 REFRESH CONTROL SYSTEM
摘要 PURPOSE:To eliminate the need for a memory end signal produced through the competition between the memory access and the refresh and to make high speed, by eliminating a racking circuit in a refresh control system of a dynamic type memory. CONSTITUTION:A memory controller performing refresh control receives an access request to a volatile memory 22, a microprogram control type processor 21 managing a memory refresh request and a clear signal incoming externally, this clear signal is synchronized with a refresh clock determining the refresh interval and supplied to the processor 21 at a refresh control section 24 mainly. A test microinstruction is set at the head of a microinstruction started with the clear signal and the execution of the microinstruction is blocked until the clear signal is released.
申请公布号 JPS5782280(A) 申请公布日期 1982.05.22
申请号 JP19800155455 申请日期 1980.11.05
申请人 TOKYO SHIBAURA DENKI KK 发明人 SATOU KAZUYUKI
分类号 G11C11/406 主分类号 G11C11/406
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