发明名称 DEMODULATOR
摘要 PROBLEM TO BE SOLVED: To provide the demodulator that conducts fading distortion compensation in which processing time is reduced and power consumption is decreased while keeping the accuracy of the fading distortion compensation. SOLUTION: A fading distortion estimate circuit 31 uses a known symbol such as a pilot symbol from an input signal to estimate a distortion quantity for each data symbol of each subcarrier. A fading distortion compensation circuit 32 uses received data symbols and the distortion estimate estimated by the fading distortion estimate circuit 31 to allow normalizing shift number detection sections 33 to match digits of the data in the unit of blocks including the pilot symbol and to eliminate the distortion of the received data symbol. Thus, the processing time and the power consumption are reduced while keeping the accuracy of fading distortion compensation.
申请公布号 JPH10117160(A) 申请公布日期 1998.05.06
申请号 JP19960284606 申请日期 1996.10.08
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIURA YASUO;ISHIKAWA KIMIHIKO;TSUBAKI KAZUHISA
分类号 H04L27/38;H04B1/10;H04B1/76;H04B7/005;H04L27/01 主分类号 H04L27/38
代理机构 代理人
主权项
地址